포지션 상세
We are building Terafab, a vertically integrated semiconductor factory at an unprecedented scale. The facility houses logic, memory, packaging, test, and lithography mask production under one roof, optimized for rapid iteration and maximum compute density per square foot. As a Process Integration Engineer, you will own the integration of unit processes into complete fabrication flows, driving yield, reliability, and manufacturability from early concept through high-volume production. This is a ground-level role at one of the most ambitious fab programs in the world.
• Define integration schemes for advanced logic and memory at 2nm-class nodes, including FinFET or GAA architectures
• Partner with unit process teams to define process windows and integration constraints
• Develop and maintain process flow documentation, traveler specifications, and integration decision logs
• Lead root cause analysis and systematic yield improvement across full-flow integration splits
• Interface with equipment, metrology, and data teams to establish inline monitoring and SPC at key integration checkpoints
• Collaborate with design and EDA teams to validate process-design interactions and close PDK parameters
• Support technology transfer and ramp readiness as Terafab scales toward production
• 5+ years of engineering experience in a high-volume semiconductor fab (logic, memory, or foundry)
• Deep knowledge of at least one advanced node (sub-10nm) and its integration tradeoffs
• Hands-on experience with full-flow integration splits, wafer-level experiments, and yield analysis
• Proficiency with statistical tools (JMP, R, Python) for DOE design, SPC, and process characterization
• Experience with GAA transistor architecture, high-NA EUV, or backside power delivery integration
• Familiarity with heterogeneous integration or advanced packaging flows (CoWoS, SoIC, or equivalent)
• Experience standing up a new process flow from scratch in a greenfield environment
• Demonstrated ability to drive cross-functional alignment across unit process, equipment, and design teams
• Ability to travel internationally (10%)
주요업무
• Own end-to-end process integration from design-rule development through full-flow execution and HVM readiness• Define integration schemes for advanced logic and memory at 2nm-class nodes, including FinFET or GAA architectures
• Partner with unit process teams to define process windows and integration constraints
• Develop and maintain process flow documentation, traveler specifications, and integration decision logs
• Lead root cause analysis and systematic yield improvement across full-flow integration splits
• Interface with equipment, metrology, and data teams to establish inline monitoring and SPC at key integration checkpoints
• Collaborate with design and EDA teams to validate process-design interactions and close PDK parameters
• Support technology transfer and ramp readiness as Terafab scales toward production
자격요건
• Bachelor's degree in electrical engineering, materials science, chemical engineering, or equivalent experience• 5+ years of engineering experience in a high-volume semiconductor fab (logic, memory, or foundry)
• Deep knowledge of at least one advanced node (sub-10nm) and its integration tradeoffs
• Hands-on experience with full-flow integration splits, wafer-level experiments, and yield analysis
• Proficiency with statistical tools (JMP, R, Python) for DOE design, SPC, and process characterization
• Experience with GAA transistor architecture, high-NA EUV, or backside power delivery integration
• Familiarity with heterogeneous integration or advanced packaging flows (CoWoS, SoIC, or equivalent)
• Experience standing up a new process flow from scratch in a greenfield environment
• Demonstrated ability to drive cross-functional alignment across unit process, equipment, and design teams
• Ability to travel internationally (10%)
